A process is an active part of a processing system which is run by a processor and which is capable of performing certain basic data transfer operations. It is known in particular to implement processes in integrated circuits (IC), like Application Specific Integrated Circuits (ASIC), or in independent functional blocks, either integrated in a chip.
Such a process can be implemented as hardware or software process. Modern software architectures for example are based on multiple processes that are controlled by an operating system. The architecture can comprise a single or several processors. In a single processor system, processes are executed one after another, even though within a larger time window they seem to operate in parallel. Since the operations performed by different processes may be interdependent, a possibility has to be provided which enables the processes to share information among each other.
In a single processor system this is usually done via a common database or memory to which the respective information is stored by a source process and from which the information is retrieved by a destination process, since multiple processes of a single processor cannot transfer information simultaneously. In systems with more than one processor as active components, processes can be executed simultaneously. Still they need to transfer information, like data, to each other. In that case, data can be transferred directly by a source process to a destination process. If the two processes are running in different chips, the message transfer will usually cause in addition an automatic notification of the destination process when the receiver of the chip with the destination process has received the data. Alternatively, processes can send pure notifications to each other, e.g., for waking up the destination process.
FIG. 1 illustrates different communications that might be required between different processes running in an integrated circuit, e.g., in an ASIC, on a single chip. In the figure, a chip 10 comprises at least one processor capable of running several processes 11. Each process 11 is depicted in the figure as a cloud. The chip 10 further comprises several interfaces 12 depicted as rectangles. Several communications that might be required between different processes 11 and between processes 11 and interfaces 12 are indicated by arrows. Equally, communications between processes of the depicted chip with processing running on other chips not shown in the figure might become necessary.
The required communication structure, i.e., all communications that might become necessary in a processing system between different processes, can be quite different depending on the application. In particular, the number of required parallel processes and the number of physical components can vary. But also for a specific processing system, the communication structure is often difficult to predict. Thus it is commonly agreed upon that the communication structure has to be flexible enough to allow a communication between all possible combinations of processes. Another requirement is that all communication within one chip should be carried out in a similar manner in order to decrease the communication burden. Ideally, also processes in different chips should communicate in a similar manner.
Moreover, it is usually two different basic types of messages that have to be transferred between a source process and a destination process, namely data messages and notification messages. A data transfer commonly consists of a stream of multiple bits, for example audio or video streams. The length of the streams can vary, and they can contain different header information to allow various message protocols.
Notification messages, in contrast, provide some additional information to the destination process, and can inform e.g., about some transmitted data. The additional information can be for example a status or an interrupt signal. Notification messages between different processes are currently transferred as separate flag signals for which no coding is used. The number of flags can be quite high if multiple integrated chips are interconnected.
Notification and data transfer have different characteristics. A notification has to be fast and predictable in its timing with a fixed latency time, while a data transfer requires a reasonable average communication bandwidth to enable the transfer of a large amount of data within a certain time. Because of these different requirements, notification and data transfer are dealt with separately, i.e., all communication channels and status and/or interrupt signals are currently transferred separately for each process. The data transfer is done on one or multiple communication wires, and each notification message requires a separate physical flag signal. This has lead to a solution with many buses and status signals, and thus with many hardware resources.
In conventional communication structures, the number of possible connections and the additional division into notification messages and data leads to a problem because of tight pin limitations on the chips. The number of pins is considerable if all possibly required communication are to be made possible. Since all independent functional blocks need flags, the number of pins required for the connections also increases significantly with the number of independent functional blocks. The great number of pins is a common problem in almost all current ASIC and standard processors.
Since in conventional solutions, moreover all possible connections have to be fixed in hardware design, which affects the hardware development schedule and might not lead to an optimal solution, because all requirements are usually not know in the hardware implementation phase.
The problem arises equally for hardware and software processes, since the required communications are similar.